Found a little more time to troubleshoot this with the actual hardware today as well as squint at the datasheets again.
I was at least able to determine a couple more things:
I believe I've finally understood the schematics well enough to confirm that the M5 PPS operates on 3V3 I2C. I had previously gotten mixed up while trying to sort out M5's various conventions for labeling the different I2C lines (e.g. prefixes like SYS/ISO/INT/PA) as well as the fact that the M5 PPS schematic is split across two pages and I hadn't understood the precise relationship there.
TL;DR: The pins I'm using are the ISO_SCL/ISO_SCL pins as shown in the schematic below, and they are tied to the VDDB pin on the U1 isolator component, which in turn is powered via ISO_3V3 from the header.
M5 PPS I2C Pullups to 3V3 on ISO plane.png
(I also finally understand the "ISO" prefix as meaning "isolated plane", which, OK, I'll admit to a little facepalm that this wasn't obvious to me earlier.)
My wiring to the STM32 Nucleo ties ISO_SCL/ISO_SDA directly to corresponding pins on the Nucleo, while sourcing ISO_3V3 from the STM32's IOREF pin (and FWIW, I've also tried the STM32's dedicated 3V3 pin as well as probed those pins to confirm 3.3V that looks stable).
Just because it was easy to test, I tried adjusting the I2C speed parameter wayyyyy down to the comically-slow 1 kHz -- with no apparent change in behavior... but then the moment I wrote that, I realized I should check whether the Adruino TwoWire implementation I'm using actually supports arbitrary speed. Sure enough, it coerces ALL speed parameter values to one of the de facto standard values of [100 kHz, 400 kHz, 1 Mhz]. So... apparently I proved nothing via that test and doing otherwise would require hacks I'd rather not get into unless that's a pretty strong hypothesis. Sigh.
